发明名称 VIDEO SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a video signal processor generating a picture of superior quality without stretched and contracted pixels by using a line lock clock as a sampling signal on the locking circuit of the line clock used for processing a video signal and the video signal processor generating a sub-carrier frequency based on the line clock locking and generating a color difference signal using a sub-carrier frequency. SOLUTION: A fall detector 3 detects a horizontal synchronizing signal included in the video signal supplied from VTR and a free run counter 5 outputs the count of the number of clocks for one line to a subtracter 30. The subtracter 30 subtracts a reference M from the count value, outputs the result to a correction value conversion circuit 6 through an adder and converts it into correction data. The sine wave output of a sine wave generation circuit 7 is corrected in accordance with correction data and controls the line clock of the video signal affected by the stretch/contraction of a tape is controlled to a corresponding clock. The precise line clock is outputted.
申请公布号 JP2001186376(A) 申请公布日期 2001.07.06
申请号 JP19990371656 申请日期 1999.12.27
申请人 CASIO COMPUT CO LTD 发明人 TSUNODA MASAHIRO;INOUE HIDEAKI
分类号 H04N5/06;H04N9/45;(IPC1-7):H04N5/06 主分类号 H04N5/06
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