发明名称 METHOD FOR FORMING SILICIDE INTERCONNECTION LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a silicide interconnection line of a semiconductor device is provided to prevent contraction of the silicide interconnection line in a high temperature process. CONSTITUTION: In the method, an interlayer dielectric layer(12) is formed on a semiconductor substrate(11) having a conductive region(11a). Then, a contact hole is formed by etching a portion of the interlayer dielectric layer(12) to expose the conductive region(11a). Next, a plug(13) is formed in the contact hole, and then the silicide interconnection line(14) is formed on the interlayer dielectric layer(12) so as to be contacted with the plug(13). Thereafter, a rapid thermal process is performed at a temperature of 700-1000°C with hydrogen, nitrogen or inert gas ambience so as to improve bonding strength between grain boundaries in the silicide line(14). Therefore, the contraction of the silicide line(14) does not occur in a following high temperature process.
申请公布号 KR20010056939(A) 申请公布日期 2001.07.04
申请号 KR19990058625 申请日期 1999.12.17
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, SEONG GWON
分类号 H01L21/24;(IPC1-7):H01L21/24 主分类号 H01L21/24
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