| 摘要 |
A microprocessor has a first section operating at a first clock frequency and a second section operating at a second clock frequency which is lower than the first clock frequency. The processor includes a checker for determining whether an instruction was processed correctly and used input data that are known to be correct. The checker comprises a register scoreboard for tracking data dependency and a delay line which carries latency vectors indicating how many clock cycles after a first instruction begins execution before a second instruction can use a result of the first instruction. |
