发明名称 Multi chip package (MCP) applicable to failure analysis mode
摘要 An MCP has an MCP substrate, first and second semiconductor chips mounted on the MCP substrate, MCP leads connected to perimeter of the MCP substrate. MCP terminal wires disposed on the MCP substrate connect the MCP leads to the first semiconductor chip. Interface signal wires disposed on the MCP substrate connect the first and second semiconductor chips to each other. The MCP further has first and second extra bonding pads. The first extra bonding pad electrically connects to the interface signal wires. The second extra bonding pad electrically connects to the MCP leads. The second extra bonding pad is arranged near the first extra bonding pad. The first and second extra bonding pads are designed to be electrically isolated from each other in a normal usage condition. However, the first and second extra bonding pads are electrically connected to each other when failure analysis is required. Outputs from the port circuit and the MCP port circuit are inhibited by a control circuit mounted on the first semiconductor chip, so that a signal can be exchanged between the second semiconductor chip and an external circuit without using the first semiconductor chip. In this manner, the first and second extra bonding pads are electrically connected to each other, so that the second semiconductor chip can be analyzed, electrically independently of the first semiconductor chip.
申请公布号 US6255729(B1) 申请公布日期 2001.07.03
申请号 US20000476085 申请日期 2000.01.03
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OIKAWA KIYOHARU
分类号 H01L21/822;G01R31/28;H01L21/66;H01L23/495;H01L25/065;H01L27/04;H05K13/08;(IPC1-7):H05K7/20;H01L27/10;H01L21/46 主分类号 H01L21/822
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