发明名称 DELTA SIGMA D/A CONVERTER
摘要 PROBLEM TO BE SOLVED: To eliminate the need of a circuit for eliminating click noise by not generating the noise at the time of a mute operation during the idling of non- signal input in the delta sigma D/A converter of plural orders. SOLUTION: Primary differentiators corresponding to the respective orders and a switch means for reducing the input to the primary differentiators finally to a zero value are provided inside a loop filter so as to perform a sequence operation for successively lowering the order of the loop filter and finally reducing the output signals to zero at the time of stopping the operation of the delta sigma modulator (noise shaper) of the plural orders.
申请公布号 JP2001168722(A) 申请公布日期 2001.06.22
申请号 JP19990350035 申请日期 1999.12.09
申请人 NIPPON PRECISION CIRCUITS INC 发明人 TAKEDA MINORU;HANADA YOSHIHIRO;TOYAMA AKIRA
分类号 H03M1/08;H03M3/02;H03M7/00;(IPC1-7):H03M3/02 主分类号 H03M1/08
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