| 摘要 |
An address latch enable signal control circuit for electronic memories, including: a circuit for sensing an external address latch enable signal; a switching circuit connected in output to the sensing circuit; an address storage circuit, connected in output to the switching circuit and to the address sensing circuit; the switching circuit being suitable to determine the switching between a first circuit path and a second circuit path for connection between the address sensing circuit and the address storage circuit; the first circuit path connecting the sensing circuit directly to the storage circuit across the switching circuit; the second circuit path connecting the sensing circuit to the storage circuit with a delay circuit interposed, the delay circuit being suitable to produce a time delay in the connection between the address sensing circuit and the address storage circuit, the sensing circuit being suitable to generate an internal address latch enable signal meant to be stored in is the storage circuit.
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