Data storage control circuit

摘要

A shift register comprising a digital filter samples an input signal inputted from an external terminal based on a clock signal and inputs output signals a to d of the shift register constituting the results of the sampling to a gate circuit also comprising the digital filter. The voltage level of the output signal of the gate circuit makes a transition from an L level to an H level when at least three voltage levels of the output signals a to d are H levels. A sense circuit then detects changes in the voltage level of the gate circuit and outputs a signal instructing for the data outputted from the counter to be stored in the register.