发明名称 |
Operable floating gate contact for SOI with high Vt well |
摘要 |
An FET structure for utilization with a silicon-on-insulator semiconductor device structure. The structure includes a silicon-on-insulator substrate structure. Source and drain diffusion regions are provided on the silicon-on-insulator substrate. An FET body region is interconnected with the source and drain diffusion regions. A gate oxide region is arranged over at least a portion of the body region and the source and drain diffusion regions. A gate region is arranged over at least a portion of the gate oxide region. A diode is interconnected with and provides a conductive pathway between the gate region and the FET body region. The diode is electrically isolated from the FET source and drain regions and inversion channel by a high threshold FET region.
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申请公布号 |
US6249028(B1) |
申请公布日期 |
2001.06.19 |
申请号 |
US19980175308 |
申请日期 |
1998.10.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BRYANT ANDRES;NOWAK EDWARD J.;TONG MINH H. |
分类号 |
H01L29/78;H01L21/336;H01L21/8247;H01L21/84;H01L27/115;H01L29/423;H01L29/786;(IPC1-7):H01L29/00 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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