Pseudorandom noise generator for WCDMA

摘要

A circuit is designed with a plurality of logic circuits (370-374) for producing an offset state matrix. The circuit includes a first logic circuit (380-383) coupled to receive N elements of a respective row of a transition matrix and N elements of column of an input state matrix. The first logic circuit produces a multi-bit logical combination of corresponding bits of the respective row and the column. A second logic circuit (390) is coupled to receive the multi-bit logical combination and produces a respective element of the offset state matrix.