发明名称 |
Electronic circuit with clock generating circuit |
摘要 |
<p>An electronic circuit has a clock input for receiving an input clock signal. A clock processing circuit derives derived clock signals from the input clock signal, for example by frequency dividing the input clock signal. A dual edge triggered sampling circuit samples the derived clock signals at both rising and falling edges of the input clock signal. The sampled clocks are thus synchronized and are used to control operation of processing circuitry. <IMAGE> <IMAGE></p> |
申请公布号 |
EP1104105(A2) |
申请公布日期 |
2001.05.30 |
申请号 |
EP20000203712 |
申请日期 |
2000.10.26 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
SCHWARZ, PATRIK;STUDERUS, STEFAN |
分类号 |
G06F1/06;H03K5/135;H03K5/15;(IPC1-7):H03K5/15 |
主分类号 |
G06F1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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