| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock extractor which can extract the clocks corresponding to plural input ports by means of a phase-locked loop(PLL) and also can improve the data transmission efficiency by eliminating the preamble period that is conventionally necessary for the phase adjustment when the burst data are transmitted. SOLUTION: The serial data to be inputted are quantized via the triple over sampling to obtain a 1st data string, and a 2nd data string that specifies a changing point of the 1st data string is produced from the 1st data string via the EXOR processes which are adjacent to each other. The 3rd bit and its preceding and next bits are referred to at each changing point of the 2nd data string, and the 3rd bit is defined as a boundary point when the said preceding and next bit have no changing points. When the preceding and next bits have changing points, these bits are defined as boundary points. Thus, a 3rd data string is produced. Then a final clock bit string is produced by carrying out the time series EXOR between the 3rd data string and a clock bit string. |
