| 摘要 |
A method for manufacturing a capacitor of a mixed-mode circuit. A substrate is provided. An isolation region is formed on the substrate to define an active region in the substrate. An oxide layer, a first polysilicon layer and a first silicide layer are formed over the substrate. The oxide layer, the first polysilicon layer and the first silicon layer are patterned to form a gate structure on the active region and to form a first polysilicon electrode and a first silicide electrode on the isolation region. A dielectric layer is formed over the substrate. An opening is formed to expose a portion of the first silicide electrode. A second silicide layer is formed on a sidewall and a bottom of the opening and on the dielectric layer. A planarization process is performed to remove a portion of the second silicide layer above the dielectric layer, wherein the remaining second silicide layer in the opening, the silicide electrode and the polysilicon electrode together form a bottom electrode of the capacitor. A capacitor dielectric layer is formed over the substrate. A first metal layer is formed over the substrate. The first metal layer is patterned to form an upper electrode of the capacitor.
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