| 摘要 |
Data read from a disk is input to an RF amplifier. An RF amplifier generates, based on bit data, an RF signal constituted by a plurality of components of mutually different frequencies. The RF amplifier determines a relation between the frequencies and gains on the basis of a control clock and adjusts the gains of respective components in the RF signals on the basis of the relation (equalize-processing). A PLL circuit has a first VCO and first frequency divider to generate a bit clock and generates, on the basis of an output signal of a data slice circuit, a first control voltage for controlling the first VCO. The first control voltage, being passed through a lowpass filter, is converted to a second control voltage for controlling a second VCO. The second VCO has an arrangement and characteristic substantially the same as those of the first VCO. A control clock for determining the peak position of the gain, that is, the characteristic of the RF amplifier, is generated based on an output clock of the second VCO.
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