发明名称 Verfahren zur Herstellung von EEPROM- und DRAM-Grabenspeicherzellbereichen auf einem Chip
摘要 The present invention provides a method for fabricating an EEPROM memory cell having a trench capacitor, having the following steps: formation of a trench (108) in a substrate (101); formation of a buried plate (165) in the substrate region in the vicinity of the lower region of the trench (108); concerted fabrication of a floating gate surrounded by dielectric layers in order to define the EEPROM region; optional recessing of the dielectric layer in order to define DRAM regions.
申请公布号 DE19930748(C2) 申请公布日期 2001.05.17
申请号 DE1999130748 申请日期 1999.07.02
申请人 INFINEON TECHNOLOGIES AG 发明人 ZELSACHER, RUDOLF
分类号 H01L21/8239;H01L21/8242;H01L27/105;(IPC1-7):H01L21/824 主分类号 H01L21/8239
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