发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE: To realize a general-purpose excess address detecting circuit capable of being used in common for various maximum numbers of word rows and small in area in a semiconductor device having a number-of-intermediate word memory. CONSTITUTION: In this semiconductor device provided with a number-of- intermediate word memory 12 in which a number X between 2N and 2N-1 is made to be the number of rows or the number of columns, an address decoder 17 decoding an address signal indicating the row position or the column position of the number of intermediate word memory 12 to which an access is made and an excess address detecting circuit 19 detecting that the address signal selected an excess address larger than the number X, the address decoder 17 is provided with plural pre-decoders 21 decoding respectively address signals divided into plural groups and the excess address detecting circuit 19 detects that the excess address larger than the number X is selected by outputs of the plural pre-decoders 21 and the number of lines of the input signal lines of the circuit 19 is smaller than the number of outputs of the plural pre-decoders 21.
申请公布号 KR20010039792(A) 申请公布日期 2001.05.15
申请号 KR20000045505 申请日期 2000.08.05
申请人 FUJITSU LIMITED 发明人 SUSUKI MASATO
分类号 G11C11/413;G06F12/06;G06F12/16;G11C8/00;G11C8/12;H01L27/10;(IPC1-7):H01L27/10 主分类号 G11C11/413
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