发明名称 Process for fabricating semiconductor memory device with high data retention including silicon nitride etch stop layer formed at high temperature with low hydrogen ion concentration
摘要 A semiconductor memory device such as a flash Electrically Erasable Programmable Read-Only Memory (Flash EEPROM) includes a floating gate with high data retention. A tungsten damascene local interconnect structure includes a silicon nitride etch stop layer which is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of at least 480° C. such that the etch stop layer has a very low concentration of hydrogen ions. The minimization of hydrogen ions, which constitute mobile positive charge carriers, in the etch stop layer, minimizes recombination of the hydrogen ions with electrons on the floating gate, and thereby maximizes data retention of the device.
申请公布号 US2001001075(A1) 申请公布日期 2001.05.10
申请号 US20000745626 申请日期 2000.12.20
申请人 VANTIS CORPORATION 发明人 NGO MINH VAN;MEHTA SUNIL
分类号 H01L21/336;H01L21/8247;H01L29/423;(IPC1-7):H01L21/336;H01L21/31;H01L21/469;H01L21/476 主分类号 H01L21/336
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