| 摘要 |
An information circuit in a semiconductor device suitable for encoding and retrieving a bit of information. The information circuit includes an input circuit and an output circuit. The input circuit includes an input node coupled to an input terminal of a transistor. The output circuit includes a load device, a fuse circuit, and first and second output terminals of the transistor all coupled in series between a power supply terminal and a ground terminal. The impedance of said fuse circuit is preferably alterable between an initial impedance and an altered impedance. An output node of said information circuit is coupled to said output circuit. The information circuit is configured such that the output node voltage is indicative of said impedance of said fuse circuit when said input node is biased to a "read" state, said power supply terminal is biased to a power supply voltage, and said ground terminal is grounded.
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