发明名称 STACKED CHIP PACKAGE
摘要 <p>PURPOSE: A stacked chip package is provided to attain an increase in a data storage capacity and further to realize a mounting of high density. CONSTITUTION: The stacked chip package(100) includes lower and upper chips(30,40) attached to leads(20) and encapsulated in a package body(70). Each chip(30,40) has electrode pads(32,42) formed on an active surface thereof. The leads(20) are interposed between both chips(30,40) and attached to the active surface of the lower chip(30) by a double-sided adhesive tape(62) and the back surface of the upper chip(40) by an insulating layer(64). In particular, the electrode pads(32) of the lower chip(30) are electrically connected to inner end portions of the corresponding leads(20) by lower metal wires(52), whereas the electrode pads(42) of the upper chip(40) are electrically connected to outer peripheral portions of the corresponding leads(20) by upper metal wires(54). Therefore, regardless of a size or a function, two chips(30,40) can be stacked together in the single package body(70).</p>
申请公布号 KR20010036630(A) 申请公布日期 2001.05.07
申请号 KR19990043732 申请日期 1999.10.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HAN, CHANG HUN;PARK, JONG YEONG
分类号 H01L23/28;(IPC1-7):H01L23/28 主分类号 H01L23/28
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