发明名称 MULTI-BIT SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A multi-bit semiconductor memory device is provided which reduces the number of input/output lines arranged between unit arrays and decreases the number of word lines, to improve noise characteristic. CONSTITUTION: A memory bank(MB1) includes memory blocks(M1-M8) and a memory bank(MB2) includes memory blocks(M9-M16). Each memory block consists of upper unit arrays(UAT1-UAT16) and lower unit arrays(UAB1-UAB16). Four pairs of input/output lines(L9,L10) are arranged only between the memory banks, and two pairs of input/output lines are respectively arranged between the memory blocks in the banks. Different two pairs of input/output lines are arranged at the left and right of the upper unit arrays and the lower unit arrays in each memory block. The lines are connected to data buses through multiplexers. Accordingly, the memory block share the four pairs of input/output lines and the upper and lower unit arrays also share the lines. The lines are multiplexed by a multiplexer(MUX9).
申请公布号 KR20010036706(A) 申请公布日期 2001.05.07
申请号 KR19990043821 申请日期 1999.10.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KO, TAE YEONG
分类号 G11C5/02;(IPC1-7):G11C5/02 主分类号 G11C5/02
代理机构 代理人
主权项
地址