| 摘要 |
<p>A single-instruction multiple-data (SIMD) array processor (100) for processing multi-dimensional node meshes that are either elongated or not elongated in at least one coordinate direction. The SIMD array processor (100) includes a plurality of processor arrays (102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132) interconnected to form an N-dimensional array. Each processor array (102...) is connected to 2N data I/O paths for communicating with 2N processor arrays in the N-dimensional array. Each processor array conceptually located at an interior point of the N-dimensional array is connected to 2N dimensionally adjacent processor arrays in the N-dimensional array. Each processor array conceptually located at one of at least one pair of dimensionally opposite boundaries of the N-dimensional array is connected to fewer than 2N dimensionally adjacent processor arrays and at least one processor array conceptually located at the dimensionally opposing boundary.</p> |
