| 摘要 |
Memory banks are assigned to the memory map of a common processor in an order corresponding to a physical characteristic of the respective memory bank, e.g., a physical distance to the processor and/or an electrical distance to the processor. In this way, the operating frequency of the processor can be increased beyond conventionally guaranteed limits at the expense of abandoning the farthest memory banks when not necessary for a particular application. Similarly, abandonment of the farther memory banks in accordance with the principles of the present invention allows operation of the processing system at higher temperatures and/or lower power voltages. In another embodiment of the present invention, wait states may be added to accesses to the farther memory banks such that the closest memory banks may be operated at the highest possible performance level, e.g., without any wait states. The performance of the individual memory banks may be monitored and a wait state table adjusted to adjust to environmental conditions such as temperature and/or power voltage.
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