Method of ion implantation for adjusting the threshold voltage of MOS transistors

摘要

The invention relates to an ion implantation method for adjusting the threshold voltage of MOS transistors. The MOS transistor is employed in a DRAM (dynamic random access memory) memory cell in a semiconductor wafer and comprises a substrate, a gate insulating layer positioned on the substrate, and a gate conducting layer with a rectangular-shaped cross section positioned on the gate insulating layer. The method comprises performing an ion implantation process at a predetermined dosage and ion energy to implant dopants through the gate conducting layer and gate insulating layer and deposit the dopants into the superficial portion of the substrate below the gate insulating layer.