MOS-Technologie-Leistungsanordnung in integrierter Struktur
摘要
A MOS-technology power device integrated structure comprises a plurality of elementary functional units formed in a semiconductor material layer (3) of a first conductivity type. The elementary functional units comprise body stripes (9;90) of a second conductivity type extending substantially parallely to each other and source regions (14;140) of the first conductivity type. A conductive gate layer (17;170) is insulatively disposed over the semiconductor material layer (3) between the body stripes (9;90). A mesh (4;40) of the second conductivity type is formed in the semiconductor material layer (3) and comprises an annular frame region (5;50) surrounding the plurality of body stripes (9;90) and at least one first elongated stripe (7;60) extending within the annular frame region (5;50) in a direction substantially orthogonal to the body stripes (9;90) and merged with the annular frame region (5;50), the body stripes (9;90) being divided by the first elongated stripe (7;60) in two respective groups and being merged with the mesh (4;40). A conductive gate finger (25;250) connected to said conductive gate layer (17;170) insulatively extends over the first elongated stripe (7;60). Source metal plates (20;200) are provided covering each group of parallel body stripes and contacting each body stripe of the group. The conductive gate finger (25;250) is covered and contacted by a respective metal gate finger (27;270). <IMAGE>
申请公布号
DE69518653(T2)
申请公布日期
2001.04.19
申请号
DE1995618653T
申请日期
1995.12.28
申请人
STMICROELECTRONICS S.R.L., AGRATE BRIANZA;CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO, CATANIA
发明人
GRIMALDI, ANTONIO;SCHILLACI, ANTONINO;FRISINA, FERRUCCIO;FERLA, GIUSEPPE