| 摘要 |
PURPOSE: A method and an apparatus using a distribution system structure for supporting a bus-based cache coherence protocol for a symmetric multi-processor are provided to improve a data processing rate in a data processing system by using a structure of distribution system. CONSTITUTION: A node(410) has processors(411-412) as masters of the node(410). The processors(411,412) are connected to the node controller(415) through buses(413,414). A node(420) has a processor(421) and an input/output agent(422) as masters of the node(420). The processor(421) and the input/output agent(422) are connected to a node controller(425) through each bus(423,424). The node controllers(415,425) forms a physical interface between the masters and the remaining elements of the system. Each node controller(415,425) within the system intervenes between each processor bus. Each node controller(415,425) comprise all logics necessary for communication. The node controllers(415) are connected with an address switch(430) through single directional address exclusive buss(416,417). The node controller(425) is connected with the address switch(430) by each bus(426,427). The address switch(430) is connected with memory sub systems(442,444) by single directional bus connections(431,432).
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