| 摘要 |
PROBLEM TO BE SOLVED: To rewrite a flash ROM not via the CPU of an extended board. SOLUTION: When a flash ROM down-load mode from a host CPU 2 to a PCI bus bridge 29 of an extended board 12 is set, a bus release request signal from a CPU bus release request signal generating part 34 of the extended board 12 to a CPU 21 is asserted so that the CPU 21 can release a bus 20, and the bus of a flash ROM 22 can drive a PCI bus bridge 29. The host CPU 2 executes a rewriting algorithm to the flash ROM 22 so that writing in all address regions can be attained.
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