发明名称 |
Betriebsverfahren für zwei Datenbusse |
摘要 |
The invention relates to an operating method for two data buses, each with a clock generator. The clock generators are synchronised with one another, by the clock generator of the higher frequency synchronising the clock generator of the lower frequency to its own clock pulse frequency.
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申请公布号 |
DE19947660(A1) |
申请公布日期 |
2001.04.12 |
申请号 |
DE19991047660 |
申请日期 |
1999.10.04 |
申请人 |
BAYERISCHE MOTOREN WERKE AG |
发明人 |
PELLER, MARTIN;BERWANGER, JOSEF |
分类号 |
H04L12/44;H04L12/403;(IPC1-7):H04L12/40 |
主分类号 |
H04L12/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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