发明名称 Offset correcting circuit for encoder
摘要 An offset correcting circuit for an encoder capable of detecting a correct offset value even when a sampling period is long as in the case of a low-speed A/D converter and restraining the influence of noise. The offset correcting circuit for an encoder adapted to output an angle signal based on digital signals obtained by performing A/D conversions of two signals having phases different by about 90 degrees in accordance with the same timing includes an offset detecting circuit for obtaining an offset value of one of the two signals, using an A/D converted value of that one signal which is obtained when an A/D converted value of the other of the two signals is zero or close to zero, and a compensating circuit for compensating an offset of that one signal using the offset value detected by the offset detecting circuit.
申请公布号 US6215426(B1) 申请公布日期 2001.04.10
申请号 US19990214760 申请日期 1999.01.12
申请人 FANUC LTD. 发明人 TANIGUCHI MITSUYUKI;INOUE TADASHI
分类号 G01B21/00;G01D5/244;G01D5/245;G01P5/20;H03M1/06;H03M1/30;(IPC1-7):H03M1/48 主分类号 G01B21/00
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