发明名称 CLOCK SUPPLY DEVICE COMPOSING OF MULTI-LINE SYSTEM
摘要 PURPOSE: A clock supply device composing of a multi-line system is provided to generate a stable clock and minimize a delay phenomenon and a phase difference of the clock by using a digital method. CONSTITUTION: Tributary units(111,112) are used for performing a function of subscriber connection. A multitude of line monitoring units(113,114,115,116) are used for monitoring a state of line. A switching portion(130) is used for performing a switching operation for connecting or disconnecting the line monitoring units(113,114,115,116) with the tributary units(111,112). Data are inputted into each board by the switching operation of the switching unit(130). The line monitoring units(113,114,115,116) are connected with a plurality of radio monitoring portions(121,122,123,124), respectively. The radio monitoring portions(121,122,123,124) are used for monitoring a state of a radio signal. A clock generation circuit(101) is used for extracting a clock from received data or generating the clock from a reference value of a reference signal. The clock of the clock generation circuit(10) is inputted into a clock branching portion(102). The clock signals of the clock branching portion(102) are inputted into each clock patching portions(103,104,105,106).
申请公布号 KR100293939(B1) 申请公布日期 2001.04.09
申请号 KR19980004783 申请日期 1998.02.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 BAE, SEONG JIN;KIM, HAN SEOK
分类号 H04J3/06;(IPC1-7):H04L7/00 主分类号 H04J3/06
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