发明名称 METHOD FOR MANUFACTURING ELECTRICAL INTERCONNECTION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for manufacturing an electrical interconnection of a semiconductor device is provided to decrease permittivity of an interlayer dielectric, by preventing a separate silicon nitride layer functioning as a capping layer in forming the electrical interconnection by a damascene process using a chemical mechanical polishing(CMP) process. CONSTITUTION: An interlayer dielectric(500) is formed on a semiconductor substrate(100). A contact hole(550) is formed in the interlayer dielectric. A conductive plug(701) for filling the contact hole is formed. The interlayer dielectric adjacent to the conductive plug is etched to form a lengthily-extended groove(570) which exposes a sidewall of the conductive plug. The groove is filled to form a conductive line electrically connected to the conductive plug.
申请公布号 KR20010026126(A) 申请公布日期 2001.04.06
申请号 KR19990037314 申请日期 1999.09.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, HYEON DEOK;PARK, BYEONG RYUL;YOO, BONG YEONG
分类号 H01L21/283;(IPC1-7):H01L21/283 主分类号 H01L21/283
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