发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for manufacturing a semiconductor device is provided to reduce fringe capacitance and to shorten resistor-capacitor(RC) delay time, by forming a capping layer on copper interconnections while preventing the capping layer on an interlayer dielectric between the copper interconnections. CONSTITUTION: The first conductor(11) is formed on a semiconductor substrate. An interlayer dielectric(13) is formed on the semiconductor substrate, exposing a partial region of the first conductor and having groove parts separated from each other by a predetermined interval where the groove parts have a damascene structure. After a barrier layer(17) is formed on the interlayer dielectric inside the exposed first conductor and the grooves to prevent a copper diffusion to the first conductor, copper interconnections(21) filled in the grooves are formed. A capping layer(27) is selectively formed on the copper interconnection to prevent a copper diffusion from an upper surface of the copper interconnections.
申请公布号 KR20010026464(A) 申请公布日期 2001.04.06
申请号 KR19990037797 申请日期 1999.09.07
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, YEONG UK;YOON, JUNG RIM
分类号 H01L21/3205;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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