| 摘要 |
A nonvolatile memory device (10) has a signature code generator (35) generating an new signature code (Q) as a function of data (D) read from the cell array (24) and the previously calculated signature code. Data are read in sequence, using an internal clock (CK) generated by an internal clock oscillator (11). In test mode, the memory is scanned sequentially, beginning from any memory location, selected randomly, and the signature code (Q) is variable in dynamic way; at the end of memory scanning, the signature code (Q) is compared to an expected result. Thus, testing may be performed at Wafer Sort Test Level, reading the memory cells at the memory operative speed, so as to ensure an early, fast and thorough detection of faults. <IMAGE> |
