Motion compensation apparatus for digital video format down-conversion

摘要

The invention described herein is an efficient motion compensation apparatus for digital video format down-conversion. This apparatus is characterized by an interpolation and decimation filters implemented using efficient computation architectures. The computation architecture comprises the frequency component computing section, coefficient weighting section and pixel reconstruction section. A simple architecture for both interpolation and decimation filtering processes has been invented. The result is the dramatic reduction of the shifting and adding or subtracting operations, making them suitable for implementation in LSI realization of the video format down-conversion of digital video systems.