发明名称 Frequency synthesis device
摘要 <p>The invention relates to a frequency synthesis device comprising a direct digital synthesis device (22) for producing by calculation a signal oscillating at a determined frequency (Fdds), the calculation being performed by a logic circuit clocked by a clock signal (Sh) having a determined clock frequency (Fh), characterized in that it further comprises transposition means (74) for transposing the signal which oscillates at the determined frequency (Fdds) using the clock frequency signal (Sh), the signal thus transposed being supplied as an output (Sref). &lt;IMAGE&gt;</p>
申请公布号 EP1089426(A1) 申请公布日期 2001.04.04
申请号 EP20000402527 申请日期 2000.09.13
申请人 ITIS 发明人 SPAMPINATO, ERIC
分类号 H03D7/00;H03B21/00;H03B21/01;H03B28/00;H03D7/16;H03D7/18;H03L7/18;H03L7/22;(IPC1-7):H03B21/01 主分类号 H03D7/00
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