| 摘要 |
Complementary read signals Bi, /Bi applied to bit line pair 1i, 2i are compared with complementary address signals Ai, /Ai in a comparison unit 10i. The result of the comparison is output to output lines 15i, 16i as complementary detection signals. The detection signals on the output lines 15i, 16i are applied to the amplifier unit 20i which starts amplifying operation, when the level "H" is applied to terminals E. An enable signal EN from outside of the circuit is applied to the first stage amplifier unit 201 of the first group and the first stage amplifier unit 20n+1 of the second group, of which output signals are applied to the terminals E of the succeeding amplifier units 202 to 20n, and 20n+2 to 202n. With this structure, the amount of electric consumption can be reduced with scarcely increasing time required for operation.
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