发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To facilitate timing design of a signal through buffers and shorten the time necessary for pattern setting by arranging a preliminary buffer for optimizing signal timing in a function block. SOLUTION: In a semiconductor integrated circuit, a buffer group 2 having a plurality of buffers is arranged in a buffer group arrangement region in an arbitrary specified region in a function block 1, e.g. any one of regions in four corners of the function block 1. The buffer group 2 consists of a buffer 3 which buffers a signal at a part between the inside of the function block 1 and the outside and is used in the case of temporary arrangement wiring in a circuit design, and a preliminary buffer 9 which has an input terminal 4 and an output terminal 6 which can be connected with arbitrary terminals of a circuit in the function block 1 by using an arrangement layer. The buffer 9 can be used in the case of re-arrangement wiring which is performed after the temporary arrangement wiring. Since mask forming can be started except an arrangement layer used for switching the buffers, the term necessary for pattern design can be shortened.
申请公布号 JP2001085525(A) 申请公布日期 2001.03.30
申请号 JP19990256339 申请日期 1999.09.09
申请人 TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP;TOSHIBA CORP 发明人 YAMAGUCHI MASAMICHI
分类号 H01L21/82;G06F17/50;(IPC1-7):H01L21/82 主分类号 H01L21/82
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