发明名称 INTEGRATED CIRCUIT DESIGN METHOD AND INTERGRATED CIRCIUT
摘要 PROBLEM TO BE SOLVED: To provide an integrated circuit design method, which enables automatic layout of an LSI containing a circuit cell needing a plurality of power source systems by using a layout tool capable of recognizing only a single power source for one circuit cell. SOLUTION: This design method makes a layout tool recognize one main power source system VDD1 from among a plurality of power source systems VDD1, VDD2 as a power source and perform wiring of a circuit cell 1 by automatic layout. An auxiliary power source system VDD2 makes the layout tool recognize a connection point via a wiring cell 4 as not as a power source but as a signal, and perfomrs wiring of he circuit cell 1 by the automatic layout.
申请公布号 JP2001085529(A) 申请公布日期 2001.03.30
申请号 JP19990262820 申请日期 1999.09.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAJIWARA JUN;KINOSHITA MASAYOSHI;SAKIYAMA SHIRO
分类号 H01L21/82;G06F17/50;(IPC1-7):H01L21/82 主分类号 H01L21/82
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