发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND FABRICATION METHOD THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To reduce leakage current of a capacitive element comprising an MISFET(metal insulator semiconductor field effect transistor). SOLUTION: A capacitive element C1 is formed utilizing the storage area of a p-channel MISFET having a gate oxide film 9B thicker than an MISFET at a logic section. A polysilicon film constituting a part of a gate electrode 10E is doped with n-type impurities so that the capacitive element C1 can operate stably even with a low power supply voltage. |
申请公布号 |
JP2001085625(A) |
申请公布日期 |
2001.03.30 |
申请号 |
JP19990259460 |
申请日期 |
1999.09.13 |
申请人 |
HITACHI LTD |
发明人 |
SUZUKI KAZUHISA;TAKAHASHI TOSHIRO;YANAGISAWA YASUNOBU;NONAKA YUSUKE |
分类号 |
H01L27/04;H01L21/822;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/8244;H01L27/06;H01L27/092;H01L27/108;H01L27/11 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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