发明名称 STI process for improving isolation for deep sub-micron application
摘要 A new method is provided for the creation of a Shallow Trench Isolation region. A layer of pad oxide is deposited on the surface of a substrate; a layer of nitride is deposited over the layer of pad oxide. The layers of pad oxide and nitride are patterned and etched over the region where the STI is to be formed, a trench is etched in the silicon for the STI region. A layer of TEOS, that serves as a buffer spacer oxide, is deposited over the surface of the layer of nitride thereby including the inside of the created trench. The layer of TEOS is etched removing the TEOS from the surface of the nitride and from the bottom of the trench but leaving a layer of TEOS in place along the sidewalls of the trench. The bottom of the trench is next etched after which the TEOS spacer buffer is removed from the sidewalls of the trench. The sidewalls of the trench now have a non-linear profile. A layer of TEOS is deposited and polished leaving the trench filled with TEOS and at the same time removing the nitride from the surface of the pad oxide. N-well and P-well implants are performed after which N+ and P+ implants are performed around the periphery of the STI trench.
申请公布号 US6207532(B1) 申请公布日期 2001.03.27
申请号 US19990408494 申请日期 1999.09.30
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 LIN CHRONG JUNG;CHEN SHUI-HUNG;SHIH JIAW-REN
分类号 H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/762
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