发明名称 MULTILAYER WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wring board which can reduce crosstalk noises between wires in a group of parallel wires stacked alternately and is suitable for an electronic circuit board, where electronic components such as a semiconductor element or the like operating at high speed, etc., are mounted, a package, or the like, applied with countermeasures against EMI noise, without deteriorating its electric characteristics. SOLUTION: This multilayer wiring board possesses a stacked wiring body, constituted by stacking a second insulating layer 12 which has second parallel wiring group L2 including a signal wiring S2, is orthogonal to a first parallel wiring group L1 on the first insulating layer I1 having a first parallel wiring group L1 including signal wiring S1, and electrically connecting the first and second parallel wiring groups L1 and L2 by means of a group of through conductors, and also which is constituted by staking a third insulating layer 13 having ground conductor layer GL opposed to the parallel wiring group L2 hereon, and in which the interval L2 between the ground conductor layer GL and the second parallel wiring group L2 is made larger than an interval h1 between the first and second parallel wiring group L1 and L2. A countermeasure against EMI noise is made possible, without causing mismatching in the impedance of the signal wiring.
申请公布号 JP2001077541(A) 申请公布日期 2001.03.23
申请号 JP19990248730 申请日期 1999.09.02
申请人 KYOCERA CORP 发明人 NOMOTO MASARU;TAKEDA SHIGETO;IKUJI MASAKI
分类号 H05K9/00;H01L23/12;H05K1/02;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K9/00
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