发明名称 TIME DOMAIN FILTER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress the generation of an error with reference to a high-frequency noise, by a method wherein a gate means which inhibits an input for the time required for discharging a capacitor down to a zero load from a charging timing or for charging the capacitor up to a prescribed electric charge amount is installed at the front stage of a multivibrator. SOLUTION: When the base of an NPN transistor 31 is set at a level 'L', the base potential of an NPN transistor 32 is set at a level 'H', the NPN transistor 32 is set to continuity, and a capacitor 37 is discharged by short- circuiting both terminals. On the other hand, when the base of the NPN transistor 32 is set at the level 'H', the NPN transistor 32 is cut off, and the charging operation of the capacitor 37 is started. In a state that a switch 30 connects the base of the NPN transistor 31 to the output of an exclusive-OR circuit 26, the switch 30 is cut off. Then, the potential of a node (e) rises at a time constant which is decided by its parasitic capacitance and a resistance 33. When the switch 30 is cut off for a period of the time constant or higher, the potential of the node (e) and that of a node (f) rise up to the level 'H', and it is possible to prevent the malfunction of this time domain filter circuit.
申请公布号 JP2001067806(A) 申请公布日期 2001.03.16
申请号 JP19990245386 申请日期 1999.08.31
申请人 SHARP CORP 发明人 MATSUOKA TOSHIAKI
分类号 G11B20/10;H03K5/1252 主分类号 G11B20/10
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