发明名称 METHOD AND ARRANGEMENT FOR LOCKING A CONTROL VOLTAGE TO A VOLTAGE-CONTROLLED OSCILLATOR
摘要 To lock a control voltage to a voltage-controlled oscillator (1) in correspondence with a desired frequency (fref), a comparator (7) compares the output frequency (fvco) of the voltage-controlled oscillator (1) with the desired frequency (fref). A signal is generated in response to any frequency difference to adjust the control voltage until the frequency difference is zero. A copy of the control voltage is generated at least when said frequency difference is zero, and this generated copy is applied as control signal to the voltage-controlled oscillator (1) to lock its output frequency at the desired frequency (fref).
申请公布号 WO0118968(A1) 申请公布日期 2001.03.15
申请号 WO2000SE01546 申请日期 2000.08.04
申请人 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) 发明人 WESTBERG, DAVID;SVALAENGE, PAER
分类号 H03L7/093;H03C3/09;H03L7/089;H03L7/14;(IPC1-7):H03L7/085 主分类号 H03L7/093
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