发明名称 System for fetching unit instructions and multi instructions from memories of different bit widths and converting unit instructions to multi instructions by adding NOP instructions
摘要 A data processing system for processing digital data comprises a first program bus for transferring a unit instruction, a second program bus for transferring a multi instruction consisting of unit instructions, a first program memory connected with said first program bus for storing the unit instruction, a second program memory connected with the second program bus for storing the multi instruction, and a process core for executing the unit or multi instruction fetched. The first and second program memories preferably have different bits widths. The process core includes an instruction input interface circuit for adding NOP instructions to a unit instruction fetched from the first program memory so as to form a multi instruction. The instruction input interface circuit preferably comprises an instruction converter for converting the unit instruction to the multi instruction by adding said NOP instructions, and an instruction selector for selecting the multi instruction generated from the instruction converter or another multi instruction fetched from the second program memory.
申请公布号 US6202143(B1) 申请公布日期 2001.03.13
申请号 US19980135550 申请日期 1998.08.18
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 RIM MIN-JOONG
分类号 G06F9/38;(IPC1-7):G06F15/00 主分类号 G06F9/38
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