| 摘要 |
PROBLEM TO BE SOLVED: To simplify a circuit configuration by enhancing an arithmetic efficiency of a product sum arithmetic operation without increasing the capacity of a delay memory. SOLUTION: Low-order 12-bits of 24-bit sample data of signals (L+C), (R+C), S1, Sr are masked and high-order 12 bits are stored in delay memories 2(L+C), 2(R+C), 2S1 and 2Sr respectively. In order to generate a primary reflection sound 12 of channels L, R, S1, Sr, 2-channel sample data corresponding to a time delay of a reflection sound from the delay memory 2 are selectively read and each coefficient in response to the attenuation of the reflection sound is multiplied by the 2-channel sample data. |
