Trench capacitor DRAM cell with vertical transistor

摘要

A dynamic random access memory (DRAM) device. The DRAM device is formed in a substrate having a top surface and a trench with a sidewall (222,223) formed in the substrate. A signal storage node is formed using a bottom portion of the trench and a signal transfer device is formed using an upper portion of the trench. The signal transfer device includes a first diffusion region (208) coupled to the signal storage node and extending from the sidewall of the trench into the substrate, a second diffusion region (210) formed in the substrate adjacent to the top surface of the substrate and adjacent the sidewall of the trench, a channel region (212) extending along the sidewall of the trench between the first diffusion region and the second diffusion region, a gate insulator (214) formed along the sidewall of the trench extending from the first diffusion region to the second diffusion region, a gate conductor (216) filling the trench and having a top surface, and a wordline (218,232) having a bottom adjacent the top surface of the gate conductor and a side aligned with the sidewall of the trench. <IMAGE>