发明名称 Methods and apparatus for processing video data
摘要 A computer system includes three processors capable to operate concurrently-a scalar processor, a vector processor, and a bitstream processor. In encoding or decoding of video data, the vector processor performs operations that can be efficiently performed by a single instruction multiple data processor, for example, a discrete cosine transform (DCT) and motion compensation. The bitstream processor performs Huffman and RLC encoding or decoding. The bitstream processor can switch contexts to enable the computer system to process several data streams concurrently. The scalar and vector processors can be programmed to execute a single arithmetic or Boolean instruction. The bitstream processor cannot be programmed to execute a single arithmetic or Boolean instruction, but can be programmed to perform an entire video data processing operation. The computer system can handle different video standards. Different Huffman encoding and decoding tables are coded to share memory. Logic is supplied to derive correct Huffman codes from the coded tables stored in the shared memory.
申请公布号 US6192073(B1) 申请公布日期 2001.02.20
申请号 US19960699382 申请日期 1996.08.19
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 READER CLIFF;SON JAE CHEOL;QURESHI AMJAD;NGUYEN LE;FREDERIKSEN MARK;LU TIM
分类号 H04N7/18;(IPC1-7):H04N7/18 主分类号 H04N7/18
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