| 摘要 |
PROBLEM TO BE SOLVED: To provide a PLL device with a fast lock time at initial rising state and at frequency switching times. SOLUTION: This PLL device 1 is provided with a variable frequency divider 3, that frequency-divides an output signal of a voltage-controlled oscillator 4 according to frequency division ratio data to provide an output of a feedback signal, a phase comparator 5 that compares the phase of the feedback signal with the phase of a reference signal and provides the output of an error signal, a low-pass filter 7 that receives the error signal and outputs a 1st signal, and a D/A converter 15 that receives part of the frequency division ratio data and outputs a 2nd signal. |
