发明名称 PARALLEL BUS SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide a parallel bus system which can extend a peripheral device and to easily expand the peripheral device which is designed to match the parallel bus system. SOLUTION: This system is equipped with one CPU 21, one or more kinds of peripheral devices 22, 23, and 24, and a parallel bus 20 which connects the CPU 21 and peripheral devices 22, 23, and 24. One line of the parallel bus 20 is used as a peripheral device selection line, another line is used as a system clock line, and other line are used as lines needed for one byte of the system; and information sent through other lines consists of command-byte, address-byte, and data-byte formats.</p>
申请公布号 JP2001043182(A) 申请公布日期 2001.02.16
申请号 JP19990209597 申请日期 1999.07.23
申请人 PRINCETON TECHNOLOGY CORP 发明人 ANGUSU RIN;FUN-TA KUO
分类号 G06F13/36;G06F12/06;G06F15/78;(IPC1-7):G06F13/36 主分类号 G06F13/36
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