发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a DRAM itself has plural ports, plural addresses can be accessed simultaneously, and enlarging of wafer area can be evaded. SOLUTION: Memory blocks B11-B41 are commonly connected to a common wiring JB1, memory blocks B12-B42 are commonly connected to a common wiring JB2, memory blocks B13-B43 are commonly connected to a common wiring JB3, and memory blocks B14-B44 are commonly connected to a common wiring JB4. When ports P1, P2 access memory blocks connected to common wiring being different, simultaneous access can be performed by controlling switches S11-S14 and S21-S22. When ports P1, P2 access memory blocks connected to common wiring being same, after accessing of a port previously starting to access is finished, accessing of the other port is started. It can be performed in also a semiconductor memory having three ports or more.
申请公布号 JP2001043674(A) 申请公布日期 2001.02.16
申请号 JP19990217308 申请日期 1999.07.30
申请人 FUJITSU LTD 发明人 HOSOI TOSHIO;OGAWA JUNJI
分类号 G11C11/401;G11C11/407;G11C11/409;H01L21/8242;H01L27/108 主分类号 G11C11/401
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