| 摘要 |
Method and circuitry for improving the accuracy and efficiency of a phase locked loop. More specifically, the present invention relates to a method and device for monitoring the frequency discrepancy between two signals (28, 30) in conjunction with at least one data signal (32) so as to improve the accuracy and efficiency of the phase locked loop. In one embodiment of the present invention, two counters (42, 44) are used to check the frequency differential between a VCO signal (28) and an external reference or input signal (30). An adjustable threshold is provided to determine whether the frequencies of the two signals are considered to be in a frequency-locked mode. A pair of flip-flops is used to minimize any erroneous detection of frequency discrepancy by validating two consecutive results of the frequency differential check. In addition, a data present signal (32) is used to control the transition between the phase-locked mode and the frequency-locked mode to minimize the potential data loss.
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