发明名称 Lading plug contact pattern for DRAM application
摘要 A method of fabricating a semiconductor device having a landing plug is provided. First, a substrate is provided, which has active areas, wordlines stretching over the active areas and an isolation layer filling the gaps between the wordlines. Second, a pattern is defined and the isolation layer masked with the pattern is etched for the formation of bitline and node contacts, wherein the pattern has a protrusion which shortens the length of the bitline to wordline overlap formed thereby. Finally, the contacts are filled with a conducting layer.
申请公布号 US6187627(B1) 申请公布日期 2001.02.13
申请号 US20000618612 申请日期 2000.07.18
申请人 WINBOND ELECTRONICS CORPORATION 发明人 CHEN HSI-CHUAN;HUANG SEN-HUAN
分类号 H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/8242
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